Design of Miniaturized On-Chip Passive Circuits in Silicon-Based Technology for 5G Communications

University of Technology Sydney. Faculty of Engineering and Information Technology.In any given wireless communication system, RF filter is an indispensable device. This is especially true for RF front-end module, which is designed to perform the process of selecting frequency band for different RF signals, and to reduce the spurious items in the transmitter and receiver chain and interference signals outside the whole transceiver system. As far as on-chip filtering solutions are concerned, the recent solutions are mainly focusing on two different types of semiconductor process, namely gallium arsenide (GaAs), and silicon-based process, such as CMOS, and silicon germanium (SiGe). In this work, some fundamental design challenges, especially device miniaturization, will be fully addressed through some novel design methodologies. To address the low-cost requirements for both prototyping and mass production, the silicon-based technology is used. As a result, the designs presented in this thesis may be suitable for some high-performance on-chip transceiver systems. In this thesis, design of miniaturized on-chip passive filters in silicon-based technology will be presented. Both band-stop filters and band-pass filters are implemented and charactierised at mm-wave frequency region. Three unique design approaches are presented

A 40-GHz Load Modulated Balanced Power Amplifier using Unequal Power Splitter and Phase Compensation Network in 45-nm SOI CMOS

© 2023 IEEE - All rights reserved. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/TCSI.2023.3282731 ​​​​​​​In this work, a ten-way power-combined poweramplifier is designed using a load modulated balanced amplifier(LMBA)-based architecture. To provide the required magnitudeand phase controls between the main and control-signal paths ofthe LMBA, an unequal power splitter and a phase compensationnetwork are proposed. As proof of concept, the designed poweramplifier is implemented in a 45-nm SOI CMOS process. At 40GHz, it delivers a 25.1 dBm Psat with a peak power-addedefficiency (PAE) of 27.9%. At 6-dB power back-off level, itachieves 1.39 times drain efficiency enhancement over an idealClass-B power amplifier. Using a 200-MHz single-carrier 64-QAMsignal, the designed amplifier delivers an average output power of16.5 dBm with a PAE of 13.1% at an EVMrms of -23.9 dB andACPR of -25.3 dBc. The die size, including all testing pads, is only1.92 mm2. To the best of the authors’ knowledge, compared withthe other recently published silicon-based LMBAs, this designachieves the highest Psat.Peer reviewe

A W-Band SPDT Switch with 15 dBm P1dB in 55-nm Bulk CMOS

© 2022 IEEE -This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/LMWC.2022.3159529Power-handling capability of bulk CMOS-based single-pole double-throw switch operating in millimetre-wave and sub-THz region is significantly limited by the reduced threshold voltage of deeply scaled transistors. A unique design technique based on impedance transformation network is presented in this work, which improves 1-dB compression point, namely P1dB, without deteriorating other performance. To prove the presented solution is valid, a 70-100 GHz switch is designed and implemented in a 55-nm bulk CMOS technology. At 90 GHz, it achieves a measured P1dB of 15 dBm, an insertion loss of 3.5 dB and an isolation of 18 dB. The total area of the chip is only 0.14 mm2.Peer reviewe

A 90-GHz Asymmetrical Single-Pole Double-Throw Switch with >19.5-dBm 1-dB Compression Point in Transmission Mode Using 55-nm Bulk CMOS Technology

© Copyright 2021 IEEE. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/TCSI.2021.3106231The millimeter-wave (mm-wave) single-pole double-throw (SPDT) switch designed in bulk CMOS technology has limited power-handling capability in terms of 1-dB compression point (P1dB) inherently. This is mainly due to the low threshold voltage of the switching transistors used for shunt-connected configuration. To solve this issue, an innovative approach is presented in this work, which utilizes a unique passive ring structure. It allows a relatively strong RF signal passing through the TX branch, while the switching transistors are turned on. Thus, the fundamental limitation for P1dB due to reduced threshold voltage is overcome. To prove the presented approach is feasible in practice, a 90-GHz asymmetrical SPDT switch is designed in a standard 55-nm bulk CMOS technology. The design has achieved an insertion loss of 3.2 dB and 3.6 dB in TX and RX mode, respectively. Moreover, more than 20 dB isolation is obtained in both modes. Because of using the proposed passive ring structure, a remarkable P1dB is achieved. No gain compression is observed at all, while a 19.5 dBm input power is injected into the TX branch of the designed SPDT switch. The die area of this design is only 0.26 mm2.Peer reviewe

π\pi-Tuning: Transferring Multimodal Foundation Models with Optimal Multi-task Interpolation

Foundation models have achieved great advances in multi-task learning with a unified interface of unimodal and multimodal tasks. However, the potential of such multi-task learners has not been exploited during transfer learning. In this work, we present a universal parameter-efficient transfer learning method, termed Predict-Interpolate Tuning ($\pi$-Tuning), for vision, language, and vision-language tasks. It aggregates the parameters of lightweight task-specific experts learned from similar tasks to aid the target downstream task. The task similarities are predicted in a unified modality-independent space, yielding a scalable graph to demonstrate task relationships. $\pi$-Tuning has several appealing benefits. First, it flexibly explores both intra- and inter-modal transferability between similar tasks to improve the accuracy and robustness of transfer learning, especially in data-scarce scenarios. Second, it offers a systematical solution for transfer learning with multi-task prediction-and-then-interpolation, compatible with diverse types of parameter-efficient experts, such as prompt and adapter. Third, an extensive study of task-level mutual benefits on 14 unimodal and 6 multimodal datasets shows that $\pi$-Tuning surpasses fine-tuning and other parameter-efficient transfer learning methods both in full-shot and low-shot regimes. The task graph also enables an in-depth interpretable analysis of task transferability across modalities.Comment: To appear in ICML 202

Qwen Technical Report

Large language models (LLMs) have revolutionized the field of artificial intelligence, enabling natural language processing tasks that were previously thought to be exclusive to humans. In this work, we introduce Qwen, the first installment of our large language model series. Qwen is a comprehensive language model series that encompasses distinct models with varying parameter counts. It includes Qwen, the base pretrained language models, and Qwen-Chat, the chat models finetuned with human alignment techniques. The base language models consistently demonstrate superior performance across a multitude of downstream tasks, and the chat models, particularly those trained using Reinforcement Learning from Human Feedback (RLHF), are highly competitive. The chat models possess advanced tool-use and planning capabilities for creating agent applications, showcasing impressive performance even when compared to bigger models on complex tasks like utilizing a code interpreter. Furthermore, we have developed coding-specialized models, Code-Qwen and Code-Qwen-Chat, as well as mathematics-focused models, Math-Qwen-Chat, which are built upon base language models. These models demonstrate significantly improved performance in comparison with open-source models, and slightly fall behind the proprietary models.Comment: 59 pages, 5 figure

Effects of Extrusion on Energy Contents and Amino Acid Digestibility of Corn DDGS and Full-Fat Rice Bran in Growing Pigs

The objectives of this study were to determine the effects of extrusion on available energy, apparent total tract digestibility (ATTD) of nutrients and energy, and amino acid (AA) digestibility of full-fat rice bran (FFRB) and corn distillers dried grain with solubles (DDGS) fed to growing pigs. Methods: In Exp. 1, a total of 30 growing pigs with initial body weight (BW) of 36.0 ± 1.8 kg were fed five different diets, including one corn basal diet and four experimental diets which were formulated by 29.06% FFRB or DDGS with or without extrusion processing. In Exp. 2, 30 ileal-cannulated pigs (initial BW: 20.3 ± 1.8 kg) were fed five different diets including 40% FFRB or DDGS with or without extrusion, and a N-free diet. Results: The results showed that there were no significant differences in DE and ME contents or ATTD of GE, DM, and OM between DDGS and FFRB (p > 0.05), but the ATTD of CP, NDF, and ADF showed significant differences between DDGS and FFRB (p p p p = 0.06 and 0.07, respectively). The AID and SID levels of CP were not different when pigs were fed diets with or without extrusion. The AID of total indispensable AA increased when pigs were fed extrusion diets (p < 0.05). Conclusion: Feed processing of extrusion could improve nutritive values of FFRB and DDGS

Fructooligosaccharide Reduces Weanling Pig Diarrhea in Conjunction with Improving Intestinal Antioxidase Activity and Tight Junction Protein Expression

This study was to illustrate the effects of fructooligosaccharide (FOS) on the antioxidant capacity, intestinal barrier function, and microbial community of weanling pigs. Results showed that FOS reduced the incidence of diarrhea (6.5 vs. 10.8%) of pigs (p p p p p p < 0.05). In conclusion, FOS activated Nrf2 signaling and increased the expression of specific tight junction proteins, which were associated with reduced diarrhea incidence